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Meeting	ACGS Committee Meeting 112 - Annapolis, Maryland - October 2013
Agenda Location	7 SUBCOMMITTEE C – AVIONICS AND SYSTEM INTEGRATION 7.3 Multicore’s Impact on Modern Avionics Control
Title	Multicore’s Impact on Modern Avionics Control
Presenter	Lui Sha
Affiliation	University of Illinois Urbana-Champaign
Available Downloads*	presentation
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Abstract	Abstract: Single Core Equivalent (SCE) Architecture Framework for Avionic Systems by Lui Sha Multicore computer platforms pose new challenges for hard real-time systems, because of the complex temporal coupling between processing cores' shared last level cache, shared memory and I/O bandwidth. This overview presents the Single Core Equivalent (SCE) software architecture for multicore systems. If managed according to SCE policies, each core can be treated as stand-alone single-core chips from the point of view of real-time schedulability analysis and certification process. Without a technology like SCE, the change of workload in one core could result in uncontrolled adverse impact on the schedulability of tasks in other cores, triggering the recertification of safety critical applications running in other cores. The time and costs of such recertification is economically unsustainable. This problem is especially critical for the avionic industry. For example, if company A, B, C, D were given IMA partitions in core 1 and their applications were certified. Now company E in Core 2 invalidates the schedulability of core 1’s applications. Who should do the modification, recertification and pay the bill? Is company E qualified to do the work for companies A, B, C and D? Suppose that Company E pays A, B, C and D to make the changes. What if the modification in Core 1 now invalidates company E’s software schedulability in core 2? Skyrocketing integration costs aside, how can we sort out such circular liability mess?